In Collaboration with Micron Intel Launched 3D XPoint Memories

On the 28th of July, 2015 in London, the company executives of the Intel and Micron Technology launched the first category of memory that is described by both the companies as a major development after 1989 when the NAND flash was first emerged. It is the 3D XPoint memory IC with 128Gbits capacity which according to a primary finding is a fixed memory that reveals a massive capacity for material property change where the metal access lines meet at a cross-point.

The buzz is already around the electronics industry that this memory may possibly bring a major revolution. It is hoped that this memory will be faster up to 1000 times than NAND flash. Also the density of the memory is 8 to 10 times more than DRAM, making the cost relatively low. The applications of 3D XPoint memory are predicted to be lucrative for the data centers and the solid-state drives.

According to the CEO of Micron Mark Durcan that this is the result of the joint venture between Intel and Micron built in 2006. It was being produced at the wafer fab in Lehi, Utah, which belongs to IM Flash Technologies LLC. The Micron CEO further enforces that the memory is structured in a way that it will remain as two planes of 64Gbits where one bit will be quantified for each cell.

The engineering details were disclosed at the launch event as well. According to the Intel and Micron while creating the 3D XPoint memory they were stressing on inventing material compounds that will be unique in nature. They did not disclose much about the switching mechanism but hinted that it is by means of modifications done in resistance of the bulk material.

There are similarities of 3D XPoint to ReRAMs developed by Crossbar Inc. as it is a resistive RAM with a select integral diode making an opaque structured device. But it has been confirmed that 3D XPoint cannot be pertained and comparing to other forms of stable memory, the 3D Xpoint is fundamentally a special switch made for bulk-switching mechanism. 

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JFET -- Transistor Essentials | Electronics

JEFT  is one very simple semiconductor line, which controls its voltage as required. It can have p-type or n-type channel.  P-type carrier is a positive charge hole, and N-type carrier is a negative charge electron. and In P-type, the current is reduced if the voltage applied to the source is less than the voltage you apply to the gate.  In contrast, in the N-type, if the voltage applied to the source is greater than the voltage applied to the gate, the current is cut short.  It has very small effect on the external circuits attached to the gate. Because, it has a huge input to impedance which can shoot up to 1010 ohms. But as the output impedance is very low, it is needed to build measuring instrument as a buffer.


ITS LESS NOISE FEATURE MAKES IT SO USEFUL

This electronic junction is tiny in size so it is employed in LCD computer circuits, memory circuits etc. Since its modulation distortion is small, it is also utilized in communication instruments, mixer circuits such as TV and FM receivers. It also required to build FM tuners.

In a JEFT transistor, one single type of carrier transmits the current, which makes it a unipolar junction. It has the property of high resistance of electrical input. While in Bipolar Junction Transistor, the input current that is conducted to the Base terminal is proportional to transistor’s input current, in a Unipolar transistor, the voltage can be controlled because there is no requirement for biasing current.
This transistor has an uncomplicated, simple structure.  It is just a voltage-controlled Electronic junction.     

 
Here the current flows through a semiconductor material between two terminals, respectively a Drain (D) and a Source(S). Through S the carriers enters the bar and through D they sign off.  When you put ‘Reverse Bias’ voltage on a gate, it “Pinches” the channel. And it switches off the electric current immediately.   G is the highly doped territory on both the sides.   

The fun part is, the current flowing through it can be compared with a water-hose. When water passes through a hose, you can put pressure around the hose to reduce the spurt of flow, a JEFT operation can also be controlled similar way. The current in this transistor depends on the region between S and D. When you constrict the current-transmitting region between these two, the current is squeezed to low flow.  To have clearer idea about the design and the functions you should check JFET Junction Field Effect Transistor video Tutorial online.